Positron AI Secures $875 Million for Next-Gen Chips
A Reno-based startup has closed a major funding round to accelerate the production of its second-generation AI inference hardware.
Positron AI has raised $875 million in a Series C financing round, establishing a post-money valuation of $5 billion. The Reno, Nevada-based company, which was founded in 2023, is focusing these resources on the development and manufacturing of its next-generation silicon designed specifically for energy-efficient AI inference tasks.
The funding was co-led by a consortium of investors including NEA, Atreides Management, and Valor Equity Partners. According to GN technics/hardware (en-US), the capital will be used to finalize the design of the Asimov chip and ramp up production for its Titan inference system, aiming to compete directly with established players in the data center market.
Investors Bet on Inference Efficiency
Positron differentiates itself by targeting memory-intensive workloads rather than general-purpose computing. The company’s first-generation chip, Atlas, is already shipping to customers and is claimed to deliver three times the compute per watt compared to Nvidia’s H100 GPUs. This focus on efficiency is central to the company’s strategy, as energy costs become a primary driver for large-scale AI deployment.
The new funding round also includes the addition of several prominent figures to the board of directors. Forest Baskett of NEA, Gavin Baker of Atreides Management, and Dylan Patel of SemiAnalysis Capital will join the board to guide the company’s strategic direction as it scales its operations.
Asimov Chip Targets High Memory Bandwidth
The core of the upcoming hardware is the Asimov chip, which is currently undergoing its final design phases. This second-generation accelerator is designed to support 2TB of memory per unit, a specification that Positron claims matches the bandwidth of Nvidia’s Rubin GPU. At the rack scale, this configuration allows for over 100TB of total memory capacity, addressing the bottlenecks often encountered in large language model inference.
The company plans to tape out the Asimov design in October 2026, marking a sixteen-month development cycle from the start of the design process. Production is slated to begin in the second half of 2027, coinciding with the launch of the Titan system, which integrates eight Asimov chips to provide 8TB of memory per system.
Manufacturing Challenges and Market Timing
While the specifications are aggressive, the path to market involves significant logistical hurdles. Positron is building a 2MW engineering data center to test these systems, a massive undertaking that requires substantial capital before commercial revenue can be generated. The company’s CEO, Mitesh Agrawal, emphasized that speed is critical in this market, noting that the lessons learned from deploying the Atlas chip at scale have directly informed the Asimov and Titan designs.
The trade-off for this rapid iteration is a heavy reliance on external funding to bridge the gap between design and mass production. With the first generation chip fabricated by Intel in the US, Positron is positioning itself as a domestic alternative in a sector dominated by global giants. The success of this round will depend on its ability to translate high memory bandwidth claims into reliable, scalable performance for enterprise customers.
