Quantum Error Protection Works on Mismatched Hardware

Quantum Elements and the University of Southern California have published a study in Nature Communications demonstrating that the surface code, a leading method for protecting quantum data from errors, can be successfully scaled on IBM Heron processors. This is significant because the Heron chips use a heavy-hex architecture, which is structurally different from the square grid that the surface code is traditionally designed for. The findings suggest that hardware manufacturers do not need to redesign their physical layouts to accommodate specific error-correction strategies, offering a more flexible path toward fault-tolerant quantum systems.

The achievement addresses a longstanding mismatch between software algorithms and physical hardware. Typically, applying the surface code to non-square architectures requires complex routing of qubits. This process creates idle periods during which qubits are not actively computing, allowing noise and errors to accumulate. By integrating a technique called dynamical decoupling with the error-correction code, the researchers were able to suppress this idle-time noise. This hybrid approach allowed the system to maintain below-threshold performance, meaning that increasing the complexity of the code actually improved its ability to protect against logical errors.

Bridging the gap between code and chip

The core challenge in quantum error correction is that the physical arrangement of qubits on a chip often dictates how information is processed. The surface code assumes a simple, square lattice of connected qubits. IBM’s Heron processors, however, use a sparser heavy-hex layout. Mapping the code onto this hardware forces some qubits to wait while others perform calculations, a state of inactivity that is detrimental to quantum stability. The team addressed this by using a depth-efficient version of the code combined with dynamical decoupling, a method that keeps qubits in a stable state during these idle windows. This combination allowed the protection to scale directionally, becoming more effective as the code size increased in specific dimensions.

Hybrid methods outperform standalone solutions

According to Daniel Lidar, Chief Scientific Officer at Quantum Elements and a co-author of the study, relying on error correction alone was insufficient for the Heron architecture. The team found that only by leveraging dynamical decoupling techniques, which later formed the basis for Quantum Elements’ Orbit function, could they demonstrate the expected improvements in error protection. Lidar noted that hybrid approaches combining decoupling and error correction will likely continue to outperform either strategy in isolation on future processors. This suggests that the most robust quantum systems will emerge from combining multiple software strategies rather than forcing hardware to fit a single theoretical model.

Implications for future quantum hardware

This research removes a significant constraint on quantum hardware design. If scalable error correction required a processor’s physical layout to perfectly match the code, developers would be forced to prioritize code compatibility over other critical engineering requirements. By proving that the surface code can adapt to the heavy-hex architecture, the study indicates that superconducting processors of various designs can potentially achieve fault tolerance. This flexibility allows hardware teams to focus on other performance metrics, such as gate fidelity and connectivity, without sacrificing error-correction capabilities. The work paves the way for broader adoption of error-correction methods across different quantum computing platforms.